Active Pages

Accessing and manipulating data has become increasingly expensive as the gap between microprocessor and memory system performance has widened. Rapid advances in DRAM density have led to several proposals to move computational logic into the memory system.

Our group has introduced Active Pages, a page-based model of computation which associates simple functions with each page of memory. For example, an Active Page may contain pixels of an image and support functions to transform and filter those pixels. Implementations of this model have achieved up to 1000X speedups over conventional memory systems on data-intensive applications. Active Page architectures have three key features which distinguish them from other intelligent memory proposals.

First, Active Page memory systems are intended to enhance microprocessor performance in a processor-memory architecture. This is in contrast to designs, such as IRAM, which focus on replacing conventional architectures with single-chip systems. While such systems have great potential for portable personal devices, memory requirements for desktop applications are likely to stay ahead of single-chip capacities.

Second, Active Pages use the same interface as conventional memory systems. Active Page data is modified with conventional memory reads and writes; Active Page functions are invoked through memory-mapped writes. Synchronization is accomplished through user-defined memory locations.

Finally, Active Pages can exploit large amounts of parallelism. A memory system typically contains hundreds to thousands of pages of physical memory. Active Page systems can potentially support simultaneous computations at each of these pages. This page-based computation supports data parallelism similar to supercomputers of the past, but in a ubiquitous technology and for commodity applications.

Faculty

  • Fred Chong
  • Graduate Students

  • Justin Hensley
  • Diana Keen
  • Mark Oskin
  • Jonathan Yao
  • Undergraduates

  • Kai Chang
  • Foo Lim
  • Lucian-Vlad Lita
  • Kiet Tieu
  • Sinclair Yeh
  • Alumni

  • Aneet Chopra
  • Darren Gold
  • Tim Sherwood
  • Publications

  • Mark Oskin, Justin Hensley, Diana Keen, Frederic T. Chong, Matthew Farrens, and Aneet Chopra. Exploiting ILP in Page-Based Intelligent Memory. To appear in the Proceedings of the International Symposium on Microarchitecture. November 1999.
  • Justin Hensley, Mark Oskin, Diana Keen, Lucian-Vlad Lita, and Frederic T. Chong. Active Page Architectures for Media Processing. To appear in the First Workshop on Media Processors and DSPs held with the 32nd Annual Symposium on Microarchitecture (MICRO32). November 1999

  • Mark Oskin, Frederic T. Chong, and Timothy Sherwood. ActiveOS: Virtualizing Intelligent Memory. In the International Conference on Computer Design (ICCD99). October 1999

  • Diana Keen, Frederic T. Chong, Mark Oskin, and Justin Hensley. Cache Coherence in Page-based Intelligent Memory, In the Eighth Workshop on Scalable Shared-memory Multiprocessors held with the 1999 International Symposium on Computer Architecture, Atlanta, Georgia

  • Mark Oskin, Frederic T. Chong, and Timothy Sherwood. Active Pages: A Model of Computation for Intelligent Memory. In the 1998 International Symposium on Computer Architecture, Barcelona, Spain. Download slides from talk.

  • Mark Oskin, Frederic T. Chong, Aamir Farooqui, Timothy Sherwood, and Justin Hensley. Low Power Design of Page-Based Intelligent Memory In the Workshop on Power-Driven Microarchitecture held with the 1998 International Symposium on Computer Architecture, Barcelona, Spain.

  • Mark Oskin, Timothy Sherwood, Justin Hensley, Sinclair Yeh, and Frederic T. Chong Sharing Data in Page-Based Intelligent Memory In the Seventh Workshop on Scalable Shared-memory Multiprocessors held with the 1998 International Symposium on Computer Architecture, Barcelona, Spain.

  • Frederic T. Chong, Mark Oskin, Timothy Sherwood, and Justin Hensley. Care and Feeding of High-Performance Processors with Reconfigurable Memory Systems. Poster paper. Symposium on Operating Systems Principles. Saint Malo, France. October 1997. (poster [low-res] poster [high-res])) (talk [low-res] talk [high-res]))
  • Tools

  • Source distribution for a gcc 2.7.2.3 compiler capable of generating SimpleScalar binaries.

    Funding

    The Active Pages Group is funded by an NSF CAREER award to Prof. Chong, by UC Davis Junior Faculty Fellowships and Grants to Prof. Chong, by Mitsubishi, and by Altera. 
    Last updated November 9, 1999
    chong@cs.ucdavis.edu