Call for Papers

The 2nd Workshop on Intelligent Memory Systems

November 12, 2000
Boston, Massachusetts
In conjunction with ASPLOS-IX 
http://arch.cs.ucdavis.edu/ims00


Increasing chip densities and inter-chip communication costs
continue to fuel interest in intelligent memory systems.  
Since the First Workshop on Mixing Logic and DRAM in 1997, 
technologies and systems for computation in memory have
developed quickly.  The focus of this workshop is to bring
together researchers from academia and industry to discuss
recent progress and future goals.  

Authors are invited to submit a 3-page extended abstract for
review by the program committee.  Submissions should be in
postscript and mailed to ims00@arch.cs.ucdavis.edu.

  Deadline for submission of extended abstracts:  August 4, 2000
                                              *** Extended to August 11 ***
  Notification of accepted abstracts:             September 15, 2000
  Full papers based upon accepted abstracts due:  October 20, 2000
 
Topics of interest include, but are not limited to:

    * Memory technology and architecture trends 
    * Power/energy optimizations for intelligent memory systems
    * Verification and testing of intelligent memory systems
    * Balancing on-chip and off-chip memory bandwidth
    * Processor, memory and system architectures for intelligent memory
    * Implementation and performance evaluation of intelligent memory
      systems 
    * Intelligent memory based multiprocessor systems
    * Memory system design issues (latency reduction/tolerance, bandwidth, 
      virtual memory support,
      memory consistency and coherence, system scaling, etc)
    * Applications of logic-in-memory technology (graphics, caches,
      network devices, programmable devices with DRAM, etc)
    * Compilation, optimizations or OS support for intelligent memory systems


Submissions describing both work-in-progress and system retrospectives
are encouraged. In addition to contributed presentations, the workshop
will include several invited talks on industrial systems and technology.
Accepted papers will appear in a printed proceedings.


Workshop Chairs:
Fred Chong (UC Davis) and Christoforos Kozyrakis (UC Berkeley)

Steering Committee:
David Patterson (UC Berkeley) and Mark Horowitz (Stanford)

Publicity and Publications:
Mark Oskin (UC Davis)

Program Committee: 

  - Krste Asanovic (MIT)
  - John Carter (Utah)
  - Fred Chong (UC Davis)
  - Nikkil Dutt (UC Irvine)
  - Jose Fortes (Purdue)
  - John Granacki (USC/ISI)
  - Patrick Hanrahan (Stanford)
  - Peter Kogge (Notre Dame)
  - Christoforos Kozyrakis (UC Berkeley)
  - Konrad Lai (Intel)
  - Kazuaki Murakami (Kyushu U.)
  - Josep Torrellas (UIUC)
  - Woodward Yang  (Harvard)