Validating Hardware and SimPoints with gem5: A RISC-V Board Case Study

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This poster investigates methods for validating hardware and simulation points with the gem5 simulator. We used a RISC-V board as a case study.

• SimPoints are used to test configuration changes without running the benchmark to completion. The weighted IPC from SimPoints has the potential to replace full gem5 runs.
• We find that iterative microbenchmark fine-tuning, when optimizing for IPC, systematically refines configurations for larger workloads.
• Future research will extend the methodology to out-of-order processors, LoopPoints, and different ISAs.

Citation

@misc{kunal2023matchedposter,
  author = {Pai, Kunal and Qiu, Zhantong and Lowe-Power, Jason},
  title= {Validating Hardware and SimPoints with gem5: A RISC-V Board Case Study},
  year= {2023},
  booktitle = {gem5 Workshop, International Symposium on Computer Architecture 2023},
  url = {https://www.gem5.org/assets/files/workshop-isca-2023/posters/validating-hardware-and-simpoints-with-gem5-poster.pdf}
}